Modern integrated radio-frequency chips have a large number of settable parameters and functions. These include, inter alia, various test functions which check that the individual areas of the radio-frequency chip are operable. In addition, different operating parameters can be set in order to optimize the radio-frequency chip for a particular, partly selectable application. The various functions and settable parameters are no longer actuated via individual control lines, however, but rather the radio-frequency chip communicates with an appropriate control unit via a serial interface. This control unit is also called a host.
A serial programming interface which has found to be particularly advantageous is one with three lines. This three-wire system is also called a three-wire bus. The bus comprises a clock line, a data line and an activation or Enable line. Communication between the control chip and the radio-frequency chip is controlled and driven by the control chip. Following activation of the programming interface by a signal on the Enable line, the control chip outputs a clock signal on the clock line. At the same time, a number of data bits are output on the data line, with preferably each clock edge of the clock signal on the clock line always appearing in the middle of a bit period of a data bit. The radio-frequency chip stores the number of data bits upon every clock edge on the clock line for as long as the signal is present on the Enable line. Suitably, the signal on the Enable line contains two possible states which can be adopted, with a first state existing whenever the control chip is transmitting data to the radio-frequency chip via the serial programming interface.
In this context, the number of data bits on the data line is dependent on various external parameters. In principle, the situation is that the data bits are combined to form a “message” or data word and are respectively stored in a register of a memory in the radio-frequency chip. As the message, a data word with a length of 24 bits has been found to be preferred. Suitably, a number of the 24 bits are defined as an address at the end of the message, so that various registers of the memory can be addressed directly within the radio-frequency chip.
FIG. 6A shows the clock signal TWB_CLK on the clock line, the signals TWB_DATA on the data line and also the signal TWB_DATA_EN_N on the Enable line of a three-wire bus. It can be seen that a rising clock edge in the clock signal TWB_CLK always appears in the middle of a data bit TWB_DATA. During the transmission of the entire message comprising the 19 data bits D19 to D0 and the four address bits A0 to A3, the signal TWB_DATA_EN_N on the Enable line is pulled to the logic low state “Low”, and hence it is indicated that data are present on the data line.
In principle, the message length is independent provided that the entire message with its data bits is guaranteed to be able to be stored within a register in the radio-frequency chip.
In addition, it is possible to use the “digital RF standard” (DigRF) for transmitting control parameters via a serial interface and preferably via the three-wire bus. The signals used for this are of similar structure to the signals in the illustration shown in FIG. 6A.
When transmitting signals based on the DigRF standard, a distinction is drawn between a read operation, in which data are read from the memory, and a write operation. Read and write operations are indicated by a first bit, as can be seen from FIGS. 6B and 6C. In addition, the address bits and the data bits of each word on the data line are interchanged. In the case of the DigRF standard, it is also possible to generate signals I2RF_DATA_EN_N of different length on the Enable line, in order to distinguish between read and write operations.
The clock signal TWB_CLK, which is used to write the data to the radio-frequency chip or to read them from it, is usually generated by an external clock generator. The clock signal TWB CLK therefore has an asynchronous profile relative to a system clock which is used and generated internally by the radio-frequency chip. It is therefore necessary to synchronize the data word which is to be transmitted, so that a possible loss of data is avoided. In this case, the synchronization needs to take place at least before the data are processed. The term synchronization is subsequently understood to mean the acceptance or output of data between two circuits which use different clock signals.
In modern radio-frequency chips, there is also the fact that the internally used registers are used in part for clock generation. It may therefore happen that data for storage are applied to a register which is not currently being operated using the system clock generated by the radio-frequency chip.